Answers to

Chapter 8 Quiz

CIS343

 

(1-7) Dynamic run-time address translation is considered a fundamental breakthrough in memory management.  It can be described thus:

1. All memory references within a process are _____.

        logical addresses

2. These are dynamically translated into _____ at run time.

        physical addresses

3. Therefore, a process can occupy _____ of memory at different times during the course of execution.

        different regions

4. As a consequence, a process can be broken into _____.

        a number of pieces

5. T/F: But, during execution, these pieces must be contiguous to each other when transferred to main memory.

        False

6-7. The two pieces of a process that must be in main memory in order for execution to proceed are the piece that holds _____ and the piece that holds _____.

        the next instruction to be fetched

        the next data location to be accessed

8. This breakthrough has two important implications.  First, a process may now be _____.

        larger than main memory

9. And, second, the operating system can increase the _____.

        degree of multiprogramming

Paging - Segmentation - Segmentation/Paging

10-12. When paging is implemented the logical address (the address referenced by a process) is translated into a _____ address, consisting of a _____ and an _____.

        virtual

        page number

        offset

13-15. This, in turn, is translated into a _____ and an _____, which is used to compute the _____ address.

        frame number

        offset

        real

16-17. Under segmentation the virtual address is translated into a _____ and an _____.

        segment number

        offset

18-20. This is then translated into a _____ and an _____ which, in turn, yields the _____.

        base address

        offset

        real address

21-23. Under segmentation/paging the virtual address is translated into a _____, a _____, and an _____.

        segment number

        page number

        offset

 

24. An alternative to the two level paging system is to use an inverted page table. With this scheme there is one entry in the page table for each . . .

        real memory page frame

25. T/F: Thus a fixed amount of memory is used for the page table, regardless of the size of virtual memory addressed by the active processes.

        True

26-27. Still, every virtual memory reference can cause two physcial memory accesses - one to fetch the _____ and one to fetch the _____.

        page table entry

        data

28-29. To overcome this problem, most virtual memory systems make use of a special _____ containing the most recently used page table entries, called a _____.

        cache

        translation lookaside buffer

30-31. When virtual memory is implemented via paging, the page table entry for each page must have a _____ bit and a _____ bit.

        resident

        modified

(32-36) Listed below are considerations relevant to the choice of page size.  Identify which argue for larger, and which for smaller page size.

32. Desire to decrease internal fragmentation.

        smaller

33. Desire to decrease size of page tables

        larger

34. Desire to increase the number of page frames available to a process

        smaller

35. Physical characteristics (rotational) of most secondary storage devices.

        larger

36. Desire to decrease the number of page faults by appeal to principle of locality

        smaller

(37-38) Identify these fetch policies:

37. A page is brought into main memory only when a reference is made to a location on that page.

        demand paging

38. Pages are brought in anticipating their later use.

        prepaging

39. Frame locking: When a frame is locked the page currently stored in that frame may not be _____.

        replaced

40. Much of the _____ is held in locked frames.

        kernel of the OS