Answers to
Quiz -
Chapter One (text)
CIS343
(1-4) List the four basic
machine elements:
1.
2.
3.
4.
Processor
Main memory
I/O modules
System bus
Identify these special
purpose registers:
5. The
register containing the address of the next instruction to be executed is the .
. .
Program
Counter (PC)
6. The
register containing the instruction being executed is the . . .
Instruction
Register (IR)
7. A
register or set of registers containing information about a process.
Program
Status Word (PSW)
(8-11) List the four basic
processor actions:
8.
9.
10.
11.
Data
transfer::processor-memory
Data
transfer::processor-I/O module
Data
processing
Execution
Control
(12-20) Complete the description
of the 9 steps of interrupt processing.
12. A
device issues _____ to the processor.
an interrupt
signal
13. The
processor _____ execution of the current instruction.
completes
14. The
processor _____. If there is one, it
sends an acknowledgement to the device.
tests for an
interrupt
15. The
processor pushes the ___ onto the system stack.
PSW and PC
16. The
processor loads the address of _____ into the PC.
the interrupt
handler
17. The
interrupt handler saves information critical to the _____, such as the contents
of the registers.
running
program
18. The
_____ is processed.
interrupt
19. The
saved _____ are retrieved and restored.
register
values
20. The
_____ and the PC are restored.
Execution of the program resumes.
PSW
(21-23) List 3 key
characteristics of memory.
21.
22.
23.
cost
capacity
access time
(24-26) Complete these
statements of key relationships among characteristics of memory.
24. Faster
access time, _____.
faster access
time, greater cost per bit
25. Greater
capacity, _____.
greater
capacity, smaller cost per bit
26. Greater
capacity, _____.
greater
capacity, slower access time
The goals of two level
organization of memory:
27. Performance goal: have overall memory speed approach that of
_____.
fast memory
28. Cost goal: have _____ of combined memory be close to that of
the slower, cheaper memory.
average cost
per bit
29. For
a high hit ratio, average memory access time is closer to the access time of
the _____ memory.
faster
30. To
meet the cost goal of the two level memory organization, since the faster
memory is much more expensive than the slower, the . . .
size of
faster must be much smaller than size of slower memory